锁相环是由鉴相器、环路滤波器和压控振荡器组成，鉴相器的输出是输入信号和反馈信号的相差的函数，环路滤波器是输出一个缓慢变化的直流，作用振荡器，调整振荡器的电压输出，即改变输出信号的频率和相位，然后振荡器的输出反馈到鉴相器，当输出信号的频率等于输入信号的频率，且二者的相差为一个常数时，锁相环系统稳定，得到的输出信号的频率达到了跟踪输入信号的目的。。。，这样作用于本地时钟，就达到了和输入同步的目的。
锁频环我不了解，但应该差不多。。。
锁相环和锁频环的锁定以及捕获、同步等概念是有区别的。
对锁相环而言，所谓锁定是指VCO频率与同步信号频率完全一致，但允许有稳定相位误差；而对锁频环而言，则在锁定时可允许VCO与同步信号有小的稳态频率误差。
1
锁相环可以锁相，使输出相位与输入相位保持一个固有和微小的相位差，并使输出频率等于输入频率。
2
这是通常意义上的锁相环，这种情况下，输出信号直接反馈至输入。锁相环可以用于倍频，是将输出信号分频后，再反馈至输入。
3
锁相环实际上锁定的是输入与输出经过分频后的信号的相位，频率相同是指输出信号经过分频后与输入信号频率相同。这样，直接输出的信号的频率就是输入信号的倍频。反馈环节是多少分频，输出对应就是多少倍频。也就是说，锁相环用于倍频时，锁的是输出经过分频后的信号，而不是输出信号！
锁相环最初用于改善电视接收机的行同步和帧同步，以提高抗干扰能力。20世纪50年代后期随着空间技术的发展，锁相环用于对宇宙飞行目标的跟踪、遥测和遥控。60年代初随着数字通信系统的发展，锁相环应用愈广，例如为相干解调提取参考载波、建立位同步等。具有门限扩展能力的调频信号锁相鉴频器也是在60年代初发展起来的。在电子仪器方面，锁相环在频率合成器和相位计等仪器中起了重要作用
锁相环技术目前的应用集中在以下三个方面：第一 信号的调制和解调；第二 信号的调频和解调；第三信号频率合成电路。
Phase-locked loop Technology (锁相环技术)
A phase-locked loop or phase lock loop (PLL) is a control system that generates a signal that has a fixed relation to the phase of a "reference" signal A phase-locked loop circuit responds to both the frequency and the phase of the input signals, automatically raising or lowering the frequency of a controlled oscillator until it is matched to the reference in both frequency and phase A phase-locked loop is an example of a control system using negative feedback
Phase-locked loops are widely used in radio, telecommunications, computers and other electronic applications They may generate stable frequencies, recover a signal from a noisy communication channel, or distribute clock timing pulses in digital logic designs such as microprocessors Since a single integrated circuit can provide a complete phase-locked-loop building block, the technique is widely used in modern electronic devices, with output frequencies from a fraction of a cycle per second up to many gigahertz
Earliest research towards what became known as the phase-locked loop goes back to 1932, when British researchers developed an alternative to Edwin Armstrong's superheterodyne receiver, the Homodyne In the homodyne or synchrodyne system, a local oscillator was tuned to the desired input frequency and multiplied with the input signal The resulting output signal included the original audio modulation information The intent was to develop an alternative receiver circuit that required fewer tuned circuits than the superheterodyne receiver Since the local oscillator would rapidly drift in frequency, an automatic correction signal was applied to the oscillator, maintaining it in the same phase and frequency as the desired signal The technique was described in 1932, in a paper by Hde Bellescise, in the French journal Onde Electrique[1]
In analog television receivers since at least the late 1930s, phase-locked-loop horizontal and vertical sweep circuits are locked to synchronization pulses in the broadcast signal[2]
When Signetics introduced a line of monolithic integrated circuits that were complete phase-locked loop systems on a chip in 1969,[3] applications for the technique multiplied A few years later RCA introduced the "CD4046" CMOS Micropower Phase-Locked Loop, which became a popular integrated circuit
Applications
Phase-locked loops are widely used for synchronization purposes; in space communications for coherent carrier tracking and threshold extension, bit synchronization, and symbol synchronization Phase-locked loops can also be used to demodulate frequency-modulated signals In radio transmitters, a PLL is used to synthesize new frequencies which are a multiple of a reference frequency, with the same stability as the reference frequency
[edit] Clock recovery
Some data streams, especially high-speed serial data streams (such as the raw stream of data from the magnetic head of a disk drive), are sent without an accompanying clock The receiver generates a clock from an approximate frequency reference, and then phase-aligns to the transitions in the data stream with a PLL This process is referred to as clock recovery In order for this scheme to work, the data stream must have a transition frequently enough to correct any drift in the PLL's oscillator Typically, some sort of redundant encoding is used; 8B10B is very common
[edit] Deskewing
If a clock is sent in parallel with data, that clock can be used to sample the data Because the clock must be received and amplified before it can drive the flip-flops which sample the data, there will be a finite, and process-, temperature-, and voltage-dependent delay between the detected clock edge and the received data window This delay limits the frequency at which data can be sent One way of eliminating this delay is to include a deskew PLL on the receive side, so that the clock at each data flip-flop is phase-matched to the received clock In that type of application, a special form of a PLL called a Delay-Locked Loop (DLL) is frequently used[4]
[edit] Clock generation
Many electronic systems include processors of various sorts that operate at hundreds of megahertz Typically, the clocks supplied to these processors come from clock generator PLLs, which multiply a lower-frequency reference clock (usually 50 or 100 MHz) up to the operating frequency of the processor The multiplication factor can be quite large in cases where the operating frequency is multiple gigahertz and the reference crystal is just tens or hundreds of megahertz
[edit] Spread spectrum
All electronic systems emit some unwanted radio frequency energy Various regulatory agencies (such as the FCC in the United States) put limits on the emitted energy and any interference caused by it The emitted noise generally appears at sharp spectral peaks (usually at the operating frequency of the device, and a few harmonics) A system designer can use a spread-spectrum PLL to reduce interference with high-Q receivers by spreading the energy over a larger portion of the spectrum For example, by changing the operating frequency up and down by a small amount (about 1%), a device running at hundreds of megahertz can spread its interference evenly over a few megahertz of spectrum, which drastically reduces the amount of noise seen by FM receivers which have a bandwidth of tens of kilohertz
汉语就用翻译软件吧 就不贴了。。
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